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Author SHA1 Message Date
Andy Wingo
2c0fdb045e Fix unused variable warning for no-literal-pool targets 
* lightening/lightening.c (jit_patch_there): Conditionally define
  flags.
 2020-06-19 16:30:12 +02:00
Andy Wingo
6e317e70dd Merge branch 'fix-literal-pool-reset' into 'master' 
Fix zeroing of literal pool entries

See merge request wingo/lightening!5
 2020-06-19 14:25:36 +00:00
Andy Wingo
97212e87bd Fix zeroing of literal pool entries 
* lightening/lightening.c (reset_literal_pool): Zero before setting size
  to 0.  Thanks to Dale Smith for pointing this out!
 2020-06-19 16:23:36 +02:00
Andy Wingo
921f13a03b Merge branch 'fix-rotate-by-zero' into 'master' 
Fix undefined behavior in ARMv7 assembler

See merge request wingo/lightening!4
 2020-06-19 14:18:14 +00:00
Andy Wingo
ffba9b08c4 Fix undefined behavior in ARMv7 assembler 
* lightening/arm-cpu.c (rotate_left): Fix the case of rotating by zero,
  which produced undefined behavior.  Many thanks to Andrew
  Gierth (andrew at tao11 riddles org uk) for the debugging and the
  fix.
 2020-06-19 16:14:52 +02:00
Andy Wingo
3260f7deeb Merge branch 'arm-fix' into 'master' 
Fix armv7 with the ARM instruction set

Closes #12

See merge request wingo/lightening!3
 2020-06-11 16:11:24 +00:00
Icecream95
2a4ed4b776
 		Add CI jobs for ARM in both instruction sets 2020-04-09 22:34:21 +12:00
Icecream95
0ff3b3163c
 		Convert BLI to BLXI for jumps to ARM code 
With this, Guile builds and runs in both ARM and Thumb mode.

Closes: #12
 2020-04-09 22:32:30 +12:00
Icecream95
11b9d3744e
 		Always emit veneers for non-bl jumps to ARM code 
It is unlikely for any ARM code to be close enough to not have needed
a veneer, but it is possible, especially if running in a program with
another JIT library.
 2020-04-09 22:31:20 +12:00
Icecream95
52ec8aefa0
 		Remove T2_BLXI 2020-04-09 21:30:40 +12:00
Icecream95
a6fee1add8
 		Use bx instead of mov for jumps on ARM 2020-04-09 21:30:13 +12:00
Icecream95
7f5f26269f
 		Stop setting the thumb bit except on jumps to veneers 
Thanks to the previous commit, the jump targets should all be correct.
 2020-04-09 20:37:12 +12:00
Icecream95
8045386a45
 		Return a function pointer from jit_address 
This will allow supporting ARM code on armv7 without having to change
any users of Lightening.
 2020-04-09 20:26:35 +12:00
Icecream95
ba24ce465f
 		Use an rsh of 0 for jumps on ARM 
This will allow supporting jumping to ARM (as opposed to Thumb) code.
 2020-04-09 20:24:47 +12:00
Icecream95
1656fc1d81
 		Add a test for local forward and backward jumps 2020-04-09 17:31:25 +12:00
Icecream95
aacaa6e38c
 		Add separate functions for veneer patching 2020-04-06 19:52:29 +12:00
Icecream95
297ae99c3f
 		Add flag bits to the jit_reloc_kind enum 2020-04-06 16:04:57 +12:00
Andy Wingo
763b1f87e7 Switch CI to use Debian stable 2020-02-18 09:56:11 +01:00
Andy Wingo
a96c0188f1 Ensure 32 bytes of stack are reserved on 64-bit Windows targets 
* lightening/x86.c (reset_abi_arg_iterator): Reserve 32 stack bytes on
  64-bit Windows systems, in accordance with ABI.  Thanks a million to
  Charles Stanhope for the patch and to Mike Gran for testing!
 2020-02-17 22:01:14 +01:00
Andy Wingo
2db2b12e85 Fix mips32r6 bug 
See also:

https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=925129
http://hades.mech.northwestern.edu/images/1/16/MIPS32_Architecture_Volume_II-A_Instruction_Set.pdf
https://lists.gnu.org/archive/html/lightning/2019-08/msg00010.html
https://lists.gnu.org/archive/html/guile-devel/2019-08/msg00030.html

* lightening/mips-cpu.c: Fix encoding of LR.  Thanks to Bruno Haible.
 2020-01-06 21:58:04 +01:00
Andy Wingo
1c36f036f6 push/pop of link register does not affect stack size on x86 
* lightening/x86-cpu.c (pop_link_register, push_link_register): Don't
  record stack size changes here.
 2019-06-20 10:53:12 +02:00
Andy Wingo
62183fb098 Add jmpi_with_link instruction 
The existing calli / callr interface is for ABI calls.  Sometimes though
you want to call some of your own code, just to get the current return
address.  ARM's branch-and-link instructions are ideal for this but they
don't exist on x86; there we emulate them by adding corresponding
pop_link_register / push_link_register instructions that are no-ops on
ARM.

* lightening.h (FOR_EACH_INSTRUCTION): Add jit_jmpi_with_link,
  pop_link_register, push_link_register.
* lightening/arm-cpu.c:
* lightening/x86-cpu.c:
* lightening/aarch64-cpu.c (jmpi_with_link, push_link_register)
  (pop_link_register): Add implementations.
* lightening/arm.h:
* lightening/aarch64.h:
* lightening/x86.h (JIT_LR): New definition.
* tests/link-register.c: New test.
 2019-06-20 10:13:37 +02:00
Andy Wingo
84b9ef087b Add breakpoint instruction 2019-05-27 18:29:26 +02:00
Andy Wingo
23bfbbaac1 Fix accidental change to ARMv7 ldr 2019-05-27 13:52:36 +02:00
Andy Wingo
bcdde6656b Add atomic operations 
These operations emit the same code that GCC does for corresponding
operations under the sequential consistency memory model.  It would be
possible to relax to acquire/release or something in the future.
 2019-05-27 11:34:13 +02:00
Andy Wingo
909c0077cc Correctly handle overflow when emitting literal pools 2019-05-27 11:34:13 +02:00
Andy Wingo
7c73f5f949 Add includable automake file 2019-05-23 10:02:00 +02:00
Andy Wingo
ff6ab1d2b1 Silence "unused" warnings 2019-05-22 23:04:30 +02:00
Andy Wingo
0b3393415e Allow add_pending_literal to return false 
This avoids invalidating offsets for the reloc.
 2019-05-22 17:29:10 +02:00
Andy Wingo
b67c4ed1e1 Avoid recursive pool emit for aarch64; add another overflow check 2019-05-21 16:05:03 +02:00
Andy Wingo
33754ba8c7 AArch64 fix 2019-05-21 15:34:40 +02:00
Andy Wingo
b7f367165f Various fixes for as-needed emission of literal pool 2019-05-21 15:25:08 +02:00
Andy Wingo
568fdecc86 Fix literal pool emission on armv7 2019-05-21 14:19:48 +02:00
Andy Wingo
0518651bfd Expose API to bless function pointers 
On ARMv7, we need to set the low bit to indicate that we're in
thumb-land.
 2019-05-21 14:00:04 +02:00
Andy Wingo
ef7abb568a Fix typo in previous commit, doh 2019-05-21 12:44:00 +02:00
Andy Wingo
d2c15dd6cd Clear literal pool more thoroughly 2019-05-21 12:38:53 +02:00
Andy Wingo
723f70ee11 Clear missing bit from literal pool 2019-05-21 12:24:20 +02:00
Andy Wingo
f49752eac0 Avoid using x18 on AArch64 2019-05-21 12:02:40 +02:00
Andy Wingo
58fc136722 Fix bounds checking on negative ldr offsets for aarch64 2019-05-20 21:35:42 +02:00
Andy Wingo
2e53911c22 Update README 2019-05-20 15:45:51 +02:00
Andy Wingo
c671c0868e Fix CI on ARMv7 2019-05-20 15:38:37 +02:00
Andy Wingo
0b5f05a8a5 Attempt to get CI working on ARMv7 2019-05-20 15:30:06 +02:00
Andy Wingo
0b7c0367d4 Add ARMv7 testing to CI 2019-05-20 15:25:03 +02:00
Andy Wingo
0b723c0401 ARMv7 backend passing all tests! 2019-05-20 15:20:33 +02:00
Andy Wingo
7dd18bddd7 ARMv7 backend compiling without warnings 2019-05-20 11:02:21 +02:00
Andy Wingo
8ce07131f1 Beginnings of VFP port to lightening 2019-05-19 23:29:10 +02:00
Andy Wingo
1ea34693cb Port of arm-cpu.c to current lightening 2019-05-19 22:21:50 +02:00
Andy Wingo
b71ddba1f7 Beginnings of ARMv7 backend 2019-05-17 10:59:59 +02:00
Andy Wingo
0da87968d1 Remove unused jit_{gpr,fpr}_is_callee_save 2019-05-17 10:59:05 +02:00
Andy Wingo
eaf702765d Remove software floating-point ARMv7 support; ARMv7 test env 2019-05-17 09:39:01 +02:00